A Sparse AI Solution for
the Real-time Edge

Skip 0 Weights
Skip 0 Activations
100x Gains

The Future of AI is Sparse

Silicon and IP

Run sparse networks for 100x gains in performance by skipping zero connections and activations. Deploy as a co-processor or tileable IP.

Software Tools

Develop compressed sparse models in frameworks like PyTorch and TensorFlow with optimization tools, and benchmark performance with a hardware simulator.

Neural Networks

Sparsified, quantized, fine-tuned, and ready-to-deploy neural networks for applications like speech enhancement, anomaly detection, neural beamforming and more!

The Sparse Processing Unit

The Sparse
Processing Unit

Hyper-Efficient Neural Network Processors for Embedded Edge Devices

SPU Hardware Platform

We’ve built our hardware platform to achieve the efficiency of an ASIC, while retaining the flexibility of a general purpose accelerator. The SPU is easy to program, easy to simulate, and easy to deploy, allowing engineers and product managers to get innovative, class-leading products to market quicker.


10x larger models
100x efficiency

First-class hardware support for dual-sparsity neural networks for low memory footprint and high efficiency.


A wider range of applications and scales

Tileable, all-digital core design with 512 kB per core. Can be ported to different process nodes.


Less time deploying, more time designing

Deploy as a co-processor or IP from PyTorch or TensorFlow. Iterate with the model performance simulator.


Unrestricted to build the impossible

CNNs, RNNs, Transformers, and custom models supported with fine-grain optimization tools.

FemtoStack SDK​

We’ve built our software development platform to help companies of all sizes deploy optimal sparse AI models for tomorrow’s applications and form factors. FemtoStack contains advanced sparse model optimization tools, a custom compiler, and a fast model performance simulator. It’s everything you need to go from exploration to deployment.


Train models from scratch or fine-tune pre-trained ones


Optimize models with sparsity regularization and quantization aware training


Simulate energy, latency, throughput, and footprint of your model on the SPU


Compile and deploy to FPGA for verification, or ASIC/SoC for production

demo 2
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AI Noise Cancellation Demo

Femtosense was at CES 2022 running an ultra-low-latency speech enhancement demo. A video is nice, but hearing is believing. Reach out to experience our latest version live and in-person!

Knowledge is Power

Get more info about the SPU and our world class models

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